Apparatus for inhibiting ring back effect of circuit and method thereof

ABSTRACT

The apparatus for inhibiting the ring back effect of a circuit comprises a first differential current mode pair and a second differential current mode pair. The first differential current mode pair outputs a first current and a second current through the controlling of a first control signal. The second differential current mode pair outputs a third current and a fourth current through the controlling of a second control signal. The second control signal is the delayed first control signal. The first current and the third current are combined to be the first output current signal, while the second current and the fourth current are combined to be the second output current signal. The magnitude and time delay of the third and fourth currents are designed to compensate the first and second currents respectively so as to inhibit the ring back effect.

FIELD OF THE INVENTION

[0001] This invention relates to an apparatus for inhibiting the ringback effect of a circuit and a method thereof. More particularly, theinvention relates to an apparatus for inhibiting the ring back effect ofa circuit used in a differential current mode pair and a method thereof.

DESCRIPTION OF THE PRIOR ARTS

[0002] Differential pair amplifiers are commonly used in the circuitdesign. One popular type of the differential pair amplifiers is thedifferential current mode pair. The current signal is used as the inputof the differential current mode pair.

[0003]FIG. 1 shows the front-end processing circuit of a differentialcurrent mode pair. In the front-end processing circuit, the differentialcurrent 8 a and 8 b are outputted to a subsequent circuit 9. Thefront-end processing circuit comprises a current source 10, switches 11a, 11 b and switch control signals 13 a, 13 b. When designing thecircuit, the circuit designer has to consider the following issues. Thefirst issue is the rising time of the differential currents 8 a and 8 b.The rising time is the time interval for the magnitude of a current tochange from a level (High/Low) to another (Low/High). The ideal risingtime is zero. The practical rising time of the differential currents 8 aand 8 b should be approached to zero. The second issue is the workingpoint of the circuit. The working point refers to the crossing point ofthe waveforms of the two differential signals. In order to avoidincorrect operation of the circuit, the ideal working point is at themiddle of the two signal levels. The third issue is the ring back effectof the circuit. The ring back effect refers to the ripples of the outputcurrents 8 a and 8 b. If the ripple is exceeding the tolerate range ofthe subsequent circuit 9, the subsequent circuit 9 will operateincorrectly.

[0004]FIG. 2 shows the ring back effect of a circuit. The outputcurrents 8 a and 8 b are rippled which is so-called ring back effect.The currents 8 a, 8 b shown in FIG. 2 have two high peaks, i.e. theovershoot current 21 and the sub-overshoot current 23, and a relativelow peak, i.e. the undershoot current 22. In order to avoid theincorrect operation of the subsequent circuit 9, the waveform of thecurrents has to be smooth. In other words, the ΔI has to be small. Inaddition, there is another effect called the power bouncing. In thedifferential pair, the switches 11 a and 11 b are switched on and offsimultaneously. At the transient moment when both the two switches areoff, the current cannot flows to the subsequent circuit 9 andaccumulates in the circuit. When one of the switches 11 a and 11 b isturned on, the current accumulated in the circuit flows to thesubsequent circuit 9 all at once. Thus, the current flown into thesubsequent circuit 9 increased abruptly. This phenomenon is called powerbouncing effect. The power bouncing effect can deteriorate the ring backeffect of the circuit and seriously degrade the performance of thesubsequent circuit 9.

[0005] The conventional method to avoid the problems mentioned above isto avoid the simultaneous operation of the two switches. For example,when the switch 11 a is about to be switch to “on” and the switch 11 bis about to be switched to “off”, the switch 11 a is switched to “on”before the switch 11 b being switched to “off”. Thus, the two switcheswill not be switched at the same time and the power bouncing effect canbe avoided. However, this conventional method will prolong the risingtime and lower the working point.

SUMMARY OF THE INVENTION

[0006] The purpose of this invention is to provide an apparatus forinhibiting the ring back effect of a circuit. In this apparatus, thecurrent is divided into a major current and a minor current, the minorcurrent compensates the major current, and the ring back phenomenon isinhibited.

[0007] The second purpose of this invention is to provide a method forinhibiting the ring back effect of a circuit, wherein the outputwaveform of the circuit is relatively smooth and the total outputcurrent of this invention and that of the conventional method aresubstantially the same.

[0008] The method of this invention comprises the steps of: providing afirst differential current pair; and providing a second differentialcurrent pair, wherein the time delay and the magnitude of the seconddifferential current pair are determined according to the firstdifferential current pair for compensating the ring back effect of thefirst differential current pair; wherein the second differential pairare coupled to the first differential pair to generate an output currentsignal pair.

[0009] In order to achieve the above purposes, this invention providesan apparatus which comprises: a first differential current mode pair anda second differential current mode pair. The first differential currentmode pair outputs a first current and a second current through thecontrolling of a first control signal. The second differential currentmode pair outputs a third current and a fourth current through thecontrolling of a second control signal. The second control signal is thedelayed first control signal. The first current and the third currentare combined to be the first output current signal, while the secondcurrent and the fourth current are combined to be the second outputcurrent signal. The magnitude and time delay of the third and fourthcurrents are designed to compensate the ripples of the first and secondcurrents respectively so as to inhibit the ring back effect of thecircuit.

[0010] In a preferred embodiment, the first differential current modepair is a major current module for outputting a major current to asubsequent circuit. The major current module further comprises: a majorsource for generating the major current, a major switch coupled to themajor source for controlling the output of the major source according toa major controlling signal, and a major controlling signal generator foroutputting the major controlling signal. The second differential currentmode pair is a compensation current module, coupled to the major currentmodule in parallel, for outputting a compensation current to thesubsequent circuit. The compensation current module further comprises: acompensation source for providing the compensation current, acompensation switch coupled to the compensation source for controllingthe output of the compensation source according to a compensationcontrolling signal, and a compensation controlling signal generator foroutputting the compensation controlling signal. Wherein a ratio of themajor current and the compensation current is determined by a dividingconstant.

[0011] The various objects and advantages of the present invention willbe more readily understood from the following detailed description whenread in conjunction with the appended drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012]FIG. 1 shows the conventional circuit of the differential currentpair.

[0013]FIG. 2 shows the ring back effect of the conventional circuit inFIG. 1.

[0014]FIG. 3 is the circuit disclosed in the embodiment of thisinvention.

[0015] FIGS. 4A˜4C show the diagram of output current of the circuitdisclosed in the embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0016] Please refer to FIG. 2, the ripples of the output currents 8 a, 8b are the so-called ring back. The effect of ring back is determined bythe difference among the overshoot 21, 23, and the undershoot 22. Thus,the ring back effect can be reduced by reducing the differences amongthe peaks.

[0017]FIG. 3 shows the circuit disclosed in the embodiment of thisinvention. In the embodiment of this invention, the circuit comprises amajor current module 5 and a compensation current module 7. The majorcurrent module 5 and the compensation current module 7 are directlyoutputting to the subsequent circuit 9. The major current module 5comprises a major current source 50 which generates a major current 500,the switches 51 a and 51 b coupled to the major current source 50, andthe first controlling signals 53 a and 53 b for controlling major outputdifferential currents 58 a and 58 b through controlling the “On” and“Off” status of the switches 51 a and 51 b. The major source 50 can beimplemented not only by a current source 50 but also a voltage sourcewith a serial resistance. The major current source 50 can be either anindependent source or a dependent source. The structure of thecompensation current module 7 is similar to that of the major currentmodule 5. The compensation current module 7 is coupled to the majorcurrent module 5 in parallel and outputs the differential currents 78 a,78 b to the subsequent circuit 9. The compensation current module 7comprises a compensation source 70 which generates a compensationcurrent 700, and the compensation switches 71 a and 71 b coupled to thecompensation source 70. The compensation controlling signals 73 a and 73b are for controlling the compensation switches 71 a and 71 brespectively. The compensation source 70 can be either a current sourceor a voltage source with a serial resistance. The compensation source 70can be either a dependent source or an independent source. The sum ofthe major current 500 and the compensation source 700 is substantiallyequal to the current 10. This can be explained by the followingformulas: 8 a=58 a+78 a and 8 b=58 b+78 b.

[0018] In this embodiment, a time delay block is coupled between themajor current module 5 and the compensation current module 7. Thus, theoutput current 78 a, 78 b are delayed. In this manner, the ring backeffect of the output current 8 a, 8 b can be compensated by the outputcurrent 78 a, 78 b respectively due to the delay of the output current78 a, 78 b. Because the structures of the circuit module 5 and thecircuit module 7 are similar, the rising times of these two circuitmodules are substantially the same. The output current 78 a, 78 b areoutputted when the major current approximately reaches the overshootstatus 21. Because the compensation current 700 is smaller than themajor current 500, the ripple of the compensation current 700 is smallerthan that of the major current 500. When the amplitude of the majorcurrent 500 begins to drop, the compensation current 700 begins to risewhich smoothes the waveform of the major current 500. When thecompensation current 700 is at the overshoot status 21, the compensationcurrent 700 can compensate the undershoot status 22 of the major current500. When the compensation current 700 is at the undershoot status 22,the major current 500 is at the sub-overshoot status 23 which alsosmoothes the waveform of the major current 500. Thus, the sum of themajor output current 58 a and the compensation output current 78 a couldbe substantially maintained. As a result, the output waveform is smoothand the ring back is inhibited.

[0019] The ratio of the major current and the compensation current isimportant to optimize the compensation effect. If the amount of theoutput currents 8 a and 8 b is 1, the amount of the compensation current700 is 1/A and the amount of the major current 500 is (A−1)/A. Base onthe result of the simulation, the value of A is within the range of 15to 20. In other words, the range of the compensation current 700 isabout 5% to 6.7% of that of the major current 500.

[0020] The delay time for outputting the compensation current 700 isalso important for the compensation. If the delay time of thecompensation current 700 is not appropriate, the ring back effect may beworsened. The delay time is related to the arrangement of the circuitelements. The appropriate delay time of the compensation current 700 iswhen the major current is approximately at the overshoot status 21. Baseon the experimental result, the optimal delay time is 0.8 ns in theembodiment of this invention.

[0021]FIGS. 4A, 4B, and 4C show the output current signal of theembodiment. The X-axis represents time. FIG. 4A shows the waveform ofthe major output current 58 a. FIG. 4B shows the waveform of thecompensation current 78 a. FIG. 4C shows the combined current 8 a. Incomparing with the waveform of the conventional circuit in FIG. 2, thewaveform in FIG. 4C is more smoothed and ring back effect is improved.Thus, the performance of the subsequent circuit 9 can be improved.

[0022] While the present invention has been shown and described withreference to preferred embodiments thereof, and in terms of theillustrative drawings, it should be not considered as limited thereby.Various possible modification, omission, and alterations could beconceived of by one skilled in the art to the form and the content ofany particular embodiment, without departing from the scope and thespirit of the present invention.

What is claimed is:
 1. An apparatus for inhibiting a ring back effect ofa circuit, comprising: a first differential current mode pair foroutputting a first current and a second current through the controllingof a first control signal; and a second differential current mode pairfor outputting a third current and a fourth current through thecontrolling of a second control signal, wherein the second controlsignal is the delayed first control signal; wherein a first outputcurrent signal is corresponding to the first current and the thirdcurrent and a second output current signal is corresponding to thesecond current and the fourth current.
 2. The apparatus of claim 1,wherein the first differential current mode pair includes: a firstsource for generating a first current, and a first switch, coupled tothe first source, for outputting the first current according to a firstcontrol signal; and a second switch, coupled to the first source, foroutputting the second current according to the inverted first controlsignal; and the second differential current mode pair includes: a secondsource for generating a second current; a third switch, coupled to thesecond source, for outputting the third current according to a secondcontrol signal; and a fourth switch, coupled to the second source, foroutputting the fourth current according to the inverted second controlsignal.
 3. The apparatus of claim 2, wherein the output of the secondsource is smaller than the output of the first source.
 4. The apparatusof claim 3, wherein the ratio of the output of the second source and theoutput of the first source is a constant.
 5. The apparatus of claim 1,wherein further includes a time delay unit for providing the secondcontrol signal through delaying the first control signal.
 6. Theapparatus of claim 1, wherein at least one of the first source and thesecond source is a current source.
 7. The apparatus of claim 1, whereinat least one of the first source and the second source is a voltagesource.
 8. The apparatus of claim 1, wherein at least one of the firstsource and the second source is an independent source.
 9. The apparatusof claim 1, wherein at least one of the first source and the secondsource is a dependent source.
 10. A method for inhibiting a ring backeffect of the circuit, comprising: providing a first differentialcurrent pair; and providing a second differential current pair, whereinthe time delay and the magnitude of the second differential current pairare determined according to the first differential current pair forcompensating the ring back effect of the first differential currentpair; wherein the second differential pair are coupled to the firstdifferential pair to generate an output current signal pair.
 11. Themethod of claim 10, wherein time delay of the first and the seconddifferential current pair is adjustable.
 12. The method of claim 10,wherein the ratio of the first differential current pair and the seconddifferential current pair is a constant.